#10824 closed defect (fixed)
swscale self tests fail with assertion since recent changes
Reported by: | Michael Niedermayer | Owned by: | |
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Priority: | important | Component: | swscale |
Version: | git-master | Keywords: | assert, regression |
Cc: | Niklas Haas | Blocked By: | |
Blocking: | 7.0 | Reproduced by developer: | no |
Analyzed by developer: | no |
Description
swscale self tests fail with assertion since recent changes
How to reproduce:
make -j32 libswscale/tests/swscale libswscale/tests/swscale ... grayf32be -> grayf32be grayf32be 96x96 -> grayf32be 64x 64 flags= 1 CRC=d85005d7 SSD= 0, 958, 667, 0 grayf32be 96x96 -> grayf32be 64x 96 flags= 1 CRC=9175737f SSD= 0, 958, 667, 0 grayf32be 96x96 -> grayf32be 64x128 flags= 1 CRC=313242fb SSD= 0, 958, 667, 0 grayf32be 96x96 -> grayf32be 96x 64 flags= 1 CRC=d4c1d3d3 SSD= 0, 958, 667, 0 Assertion c->srcBpc == 16 failed at libswscale/x86/swscale.c:533 Aborted (core dumped)
This is important as it prevents the normal workflow of testing changes to libswscale. Meaning, changes cannot be tested fully currently.
Change History (18)
comment:1 by , 10 months ago
Version: | unspecified → git-master |
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comment:2 by , 10 months ago
Keywords: | regression added |
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comment:3 by , 10 months ago
comment:4 by , 10 months ago
Status: | new → open |
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This can be reproduced quicker with libswscale/tests/swscale -src grayf32be -dst grayf32be
comment:5 by , 10 months ago
Cc: | added |
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comment:6 by , 10 months ago
Component: | undetermined → swscale |
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comment:7 by , 9 months ago
The fix for this bug has actually been on the mailing list since november:
https://ffmpeg.org//pipermail/ffmpeg-devel/2023-November/317031.html
But you blocked it at the time because you did not like the way the logic flows. I think that we should either merge the above fix to unblock 7.0, or else, we can possibly revert cedf589c09c567 for the time being. (It is no longer needed for us as of my vf_scale rewrite, although it would re-introduce a bug that libswscale API users can still hit in principle)
comment:8 by , 9 months ago
Reverting cedf589c09c567b72bf4c1a58db53d94622567e1 results in:
libswscale/tests/swscale -src gbrapf32le -dst yuvj422p 2>/dev/null
gbrapf32le -> yuvj422p
gbrapf32le 96x96 -> yuvj422p 64x 64 flags= 1 CRC=41449464 SSD= 3, 48, 53, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags= 1 CRC=3e739b4a SSD= 3, 48, 53, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags= 1 CRC=e361b8b0 SSD= 3, 48, 53, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags= 1 CRC=94d92638 SSD= 0, 13, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags= 1 CRC=968f181c SSD= 0, 13, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags= 1 CRC=d6c89e6a SSD= 0, 13, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags= 1 CRC=6f6fc49e SSD= 1, 4, 4, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags= 1 CRC=e3f7c8a2 SSD= 1, 4, 4, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags= 1 CRC=3707f630 SSD= 1, 4, 4, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags= 2 CRC=a3ce44a3 SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags= 2 CRC=aa4b48dc SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags= 2 CRC=b436b256 SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags= 2 CRC=04056f28 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags= 2 CRC=c7f13987 SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags= 2 CRC=24b31c76 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags= 2 CRC=cfe9c513 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags= 2 CRC=33b3dd30 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags= 2 CRC=99a3dbee SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags= 4 CRC=5241639b SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags= 4 CRC=fe8e9316 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags= 4 CRC=121ba0bc SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags= 4 CRC=5021f513 SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags= 4 CRC=860fc2f8 SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags= 4 CRC=12064d69 SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags= 4 CRC=5bee6afd SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags= 4 CRC=ddd3fe7b SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags= 4 CRC=825aa470 SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=524296 CRC=babf7364 SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=524296 CRC=3e320f86 SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=524296 CRC=2078a0df SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=524296 CRC=dc33bd61 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=524296 CRC=a6af96ce SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=524296 CRC=406a9e37 SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=524296 CRC=9140e242 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=524296 CRC=9b4e1039 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=524296 CRC=de2604d7 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=16 CRC=322c7c51 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=16 CRC=6d9e9b34 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=16 CRC=fa8e4b23 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=16 CRC=936a0a63 SSD= 0, 3, 3, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=16 CRC=2bb49996 SSD= 0, 3, 2, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=16 CRC=86b2d878 SSD= 0, 3, 3, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=16 CRC=836854ca SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=16 CRC=1a6a3fcc SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=16 CRC=ff0b9a5e SSD= 1, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=262176 CRC=802f41b0 SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=262176 CRC=2aec54b9 SSD= 0, 1, 2, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=262176 CRC=eeb5f0b4 SSD= 0, 2, 2, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=262176 CRC=cb64df63 SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=262176 CRC=74a89005 SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=262176 CRC=c3ac80aa SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=262176 CRC=f3b0ad71 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=262176 CRC=4da406b3 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=262176 CRC=05bb43ff SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=24580 CRC=5241639b SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=24580 CRC=fe8e9316 SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=24580 CRC=121ba0bc SSD= 0, 1, 1, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=24580 CRC=5021f513 SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=24580 CRC=860fc2f8 SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=24580 CRC=12064d69 SSD= 0, 0, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=24580 CRC=5bee6afd SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=24580 CRC=ddd3fe7b SSD= 0, 1, 0, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=24580 CRC=825aa470 SSD= 0, 1, 0, 0
While applying the 3 patches results in this:
libswscale/tests/swscale -src gbrapf32le -dst yuvj422p 2>/dev/null
gbrapf32le -> yuvj422p
gbrapf32le 96x96 -> yuvj422p 64x 64 flags= 1 CRC=4e4620b2 SSD= 25, 57, 58, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags= 1 CRC=57f758f4 SSD= 24, 56, 57, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags= 1 CRC=1bd3ea9f SSD= 25, 56, 57, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags= 1 CRC=50e02c2c SSD= 22, 26, 23, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags= 1 CRC=0c83c2cf SSD= 20, 26, 23, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags= 1 CRC=0b3014c7 SSD= 21, 26, 23, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags= 1 CRC=85404456 SSD= 23, 20, 16, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags= 1 CRC=ecdcf6be SSD= 22, 20, 15, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags= 1 CRC=092e5500 SSD= 23, 20, 16, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags= 2 CRC=6e9d9829 SSD= 24, 22, 17, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags= 2 CRC=a106275e SSD= 22, 22, 16, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags= 2 CRC=4d08cf41 SSD= 23, 22, 17, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags= 2 CRC=943f23b2 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags= 2 CRC=885b58c8 SSD= 20, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags= 2 CRC=8112577f SSD= 21, 19, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags= 2 CRC=9a0c03ef SSD= 23, 20, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags= 2 CRC=c56c0ca3 SSD= 21, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags= 2 CRC=f9e03c81 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags= 4 CRC=00ea2814 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags= 4 CRC=564602eb SSD= 21, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags= 4 CRC=46bb41f4 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags= 4 CRC=601c82d2 SSD= 21, 17, 12, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags= 4 CRC=819a2dfd SSD= 20, 17, 12, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags= 4 CRC=2955adc3 SSD= 21, 17, 12, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags= 4 CRC=b9c00071 SSD= 22, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags= 4 CRC=33a60331 SSD= 21, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags= 4 CRC=afe4ae8d SSD= 21, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=524296 CRC=aa6db4ea SSD= 24, 22, 17, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=524296 CRC=c3b7df28 SSD= 22, 22, 16, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=524296 CRC=5386b30c SSD= 23, 22, 16, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=524296 CRC=1b7bdcb6 SSD= 22, 19, 13, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=524296 CRC=f003cab9 SSD= 20, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=524296 CRC=7bebadef SSD= 21, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=524296 CRC=76fc345d SSD= 23, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=524296 CRC=d9b5803f SSD= 21, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=524296 CRC=0987e199 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=16 CRC=2c970584 SSD= 21, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=16 CRC=06354684 SSD= 21, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=16 CRC=c1f0dc24 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=16 CRC=ace5348d SSD= 21, 20, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=16 CRC=7f0cde3f SSD= 20, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=16 CRC=6c503102 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=16 CRC=e65be9d0 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=16 CRC=8b0601c4 SSD= 21, 19, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=16 CRC=80947bea SSD= 23, 19, 13, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=262176 CRC=09ede29c SSD= 24, 21, 16, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=262176 CRC=8db2f856 SSD= 22, 21, 16, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=262176 CRC=edb6e292 SSD= 22, 21, 16, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=262176 CRC=559d2739 SSD= 22, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=262176 CRC=9e11f53b SSD= 20, 18, 12, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=262176 CRC=65d0cd0c SSD= 21, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=262176 CRC=62008923 SSD= 23, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=262176 CRC=d7fad98c SSD= 21, 19, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=262176 CRC=213f258f SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x 64 flags=24580 CRC=00ea2814 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x 96 flags=24580 CRC=564602eb SSD= 21, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 64x128 flags=24580 CRC=46bb41f4 SSD= 22, 19, 14, 0
gbrapf32le 96x96 -> yuvj422p 96x 64 flags=24580 CRC=601c82d2 SSD= 21, 17, 12, 0
gbrapf32le 96x96 -> yuvj422p 96x 96 flags=24580 CRC=819a2dfd SSD= 20, 17, 12, 0
gbrapf32le 96x96 -> yuvj422p 96x128 flags=24580 CRC=2955adc3 SSD= 21, 17, 12, 0
gbrapf32le 96x96 -> yuvj422p 128x 64 flags=24580 CRC=b9c00071 SSD= 22, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x 96 flags=24580 CRC=33a60331 SSD= 21, 18, 13, 0
gbrapf32le 96x96 -> yuvj422p 128x128 flags=24580 CRC=afe4ae8d SSD= 21, 18, 13, 0
This was found by looking for differences and trying to pick something that seemed towards the worse end
so it seems the 3 patches perform worse in relation to this test, i have not investigated why and dont really have an idea why either
comment:9 by , 9 months ago
I mean the patch does make sense: the floating point doesn't have a color range, because color range is also called quantization range, and quantization is the process of transforming float to integer. Float thus has not range.
But then again as I understand our float to integer and vice versa is not perfect.
follow-up: 14 comment:10 by , 9 months ago
Michael, the change in behavior is caused by "swscale: don't assign range converters for float" in isolation. That patch is orthogonal to the bug fix for this issue, which is in these patches:
swscale/utils: correctly return from sws_init_single_context
and
swscale/utils: don't early return in yuv alpha blendaway
So we can merge those two to fix 7.0 without causing the change in behavior you observed.
comment:11 by , 9 months ago
Looking at it some more, it appears to be a regression. The patch in question is definitely not correct as-is. The condition was made overly broad, and in retrospect, is probably unnecessary.
I will investigate some more; in particular we need to make sure that the unscaled float_y_to_uint_y wrapper works as intended. But if that already works on master, that patch should probably just be dropped.
comment:12 by , 9 months ago
This still fails without the patch:
libswscale/tests/swscale -src grayf32le -dst gray8
comment:13 by , 9 months ago
here it seems working if i revert cedf589c09c567b72bf4c1a58db53d94622567e1
git revert cedf589c09c567b72bf4c1a58db53d94622567e1
libswscale/tests/swscale -src grayf32le -dst gray8
grayf32le -> gray
grayf32le 96x96 -> gray 64x 64 flags= 1 CRC=3f585472 SSD= 3, 0, 0, 0
grayf32le 96x96 -> gray 64x 96 flags= 1 CRC=f4f441fa SSD= 3, 0, 0, 0
grayf32le 96x96 -> gray 64x128 flags= 1 CRC=31414fc6 SSD= 3, 0, 0, 0
grayf32le 96x96 -> gray 96x 64 flags= 1 CRC=8fab767b SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 96 flags= 1 CRC=60e3a5c4 SSD= 24, 0, 0, 0
grayf32le 96x96 -> gray 96x128 flags= 1 CRC=775eb332 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 64 flags= 1 CRC=823bfb7e SSD= 1, 0, 0, 0
grayf32le 96x96 -> gray 128x 96 flags= 1 CRC=2aec02c1 SSD= 1, 0, 0, 0
grayf32le 96x96 -> gray 128x128 flags= 1 CRC=7da830ff SSD= 1, 0, 0, 0
grayf32le 96x96 -> gray 64x 64 flags= 2 CRC=910f3536 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 96 flags= 2 CRC=1640a27e SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x128 flags= 2 CRC=e6e9cb5a SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 64 flags= 2 CRC=a8d1449f SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 96 flags= 2 CRC=60e3a5c4 SSD= 24, 0, 0, 0
grayf32le 96x96 -> gray 96x128 flags= 2 CRC=c0acf483 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 64 flags= 2 CRC=4c7f3a3a SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 96 flags= 2 CRC=07a18ab4 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x128 flags= 2 CRC=7cbbfb24 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 64 flags= 4 CRC=0bea2826 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 96 flags= 4 CRC=8ff04a34 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x128 flags= 4 CRC=696847b0 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 64 flags= 4 CRC=8a829b68 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 96 flags= 4 CRC=60e3a5c4 SSD= 24, 0, 0, 0
grayf32le 96x96 -> gray 96x128 flags= 4 CRC=a2b1d0f2 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 64 flags= 4 CRC=259b2db8 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 96 flags= 4 CRC=b86dd1dd SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x128 flags= 4 CRC=4441dc68 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 64 flags= 8 CRC=6c4bfa06 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 96 flags= 8 CRC=aa5e1dd7 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x128 flags= 8 CRC=9ba24c03 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 64 flags= 8 CRC=999a8f88 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 96 flags= 8 CRC=60e3a5c4 SSD= 24, 0, 0, 0
grayf32le 96x96 -> gray 96x128 flags= 8 CRC=8f122a65 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 64 flags= 8 CRC=0cdc855e SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 96 flags= 8 CRC=7e39bf09 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x128 flags= 8 CRC=abfac6de SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 64 flags=16 CRC=32a33b4e SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 96 flags=16 CRC=659ecd11 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x128 flags=16 CRC=e53ed1cd SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 64 flags=16 CRC=ae788ddd SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 96 flags=16 CRC=60e3a5c4 SSD= 24, 0, 0, 0
grayf32le 96x96 -> gray 96x128 flags=16 CRC=370a4afc SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 64 flags=16 CRC=74ddd3cd SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 96 flags=16 CRC=312958ba SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x128 flags=16 CRC=c1039dc4 SSD= 1, 0, 0, 0
grayf32le 96x96 -> gray 64x 64 flags=32 CRC=18abdf63 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x 96 flags=32 CRC=4bd9bbef SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 64x128 flags=32 CRC=64121e69 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 64 flags=32 CRC=ad4696b3 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 96x 96 flags=32 CRC=60e3a5c4 SSD= 24, 0, 0, 0
grayf32le 96x96 -> gray 96x128 flags=32 CRC=c0acf483 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 64 flags=32 CRC=745a8faa SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x 96 flags=32 CRC=07a18ab4 SSD= 0, 0, 0, 0
grayf32le 96x96 -> gray 128x128 flags=32 CRC=7cbbfb24 SSD= 0, 0, 0, 0
comment:14 by , 9 months ago
Replying to Niklas Haas:
Michael, the change in behavior is caused by "swscale: don't assign range converters for float" in isolation. That patch is orthogonal to the bug fix for this issue, which is in these patches:
swscale/utils: correctly return from sws_init_single_context
and
swscale/utils: don't early return in yuv alpha blendaway
So we can merge those two to fix 7.0 without causing the change in behavior you observed.
these 2 patches cause the code to segfault
gray -> grayf32le gray 96x96 -> grayf32le 64x 64 flags= 1 CRC=78e674b6 SSD= 0, 0, 0, 0 gray 96x96 -> grayf32le 64x 96 flags= 1 CRC=e797f06f SSD= 0, 0, 0, 0 gray 96x96 -> grayf32le 64x128 flags= 1 CRC=02c0a369 SSD= 0, 0, 0, 0 gray 96x96 -> grayf32le 96x 64 flags= 1 CRC=de03cdea SSD= 0, 0, 0, 0 gray 96x96 -> grayf32le 96x 96 flags= 1 Program received signal SIGSEGV, Segmentation fault. 0x000055555556d3eb in ff_init_vscale_pfn (c=0x55555588e580, yuv2plane1=0x0, yuv2planeX=0x0, yuv2nv12cX=0x0, yuv2packed1=0x0, yuv2packed2=0x0, yuv2packedX=0x0, yuv2anyX=0x0, use_mmx=0) at libswscale/vscale.c:285 285 lumCtx = c->desc[idx].instance; (gdb) bt #0 0x000055555556d3eb in ff_init_vscale_pfn (c=0x55555588e580, yuv2plane1=0x0, yuv2planeX=0x0, yuv2nv12cX=0x0, yuv2packed1=0x0, yuv2packed2=0x0, yuv2packedX=0x0, yuv2anyX=0x0, use_mmx=0) at libswscale/vscale.c:285 #1 0x000055555555f5e6 in swscale (c=0x55555588e580, src=0x7fffffffdd00, srcStride=0x7fffffffdce0, srcSliceY=0, srcSliceH=96, dst=0x7fffffffdd20, dstStride=0x7fffffffdcf0, dstSliceY=0, dstSliceH=96) at libswscale/swscale.c:355 #2 0x0000555555562332 in scale_internal (c=0x55555588e580, srcSlice=0x55555584e0e0 <src>, srcStride=0x55555584e0c0 <srcStride.5551>, srcSliceY=0, srcSliceH=96, dstSlice=0x7fffffffde20, dstStride=0x7fffffffde10, dstSliceY=0, dstSliceH=96) at libswscale/swscale.c:1046 #3 0x0000555555562aca in sws_scale (c=0x55555588e580, srcSlice=0x55555584e0e0 <src>, srcStride=0x55555584e0c0 <srcStride.5551>, srcSliceY=0, srcSliceH=96, dst=0x7fffffffde20, dstStride=0x7fffffffde10) at libswscale/swscale.c:1213 #4 0x000055555555cef9 in doTest.constprop.2 () #5 0x000055555555db65 in main () git log --oneline -2 75a1ccaaadf (HEAD) swscale/utils: don't early return in yuv alpha blendaway 73a54cdb697 swscale/utils: correctly return from sws_init_single_context
follow-up: 16 comment:15 by , 9 months ago
Looking at this problem again, I do agree that the logic is clearly too confusing. There are too many special cases and interacting code paths.
I propose we just revert the problematic cedf5 for now, which produces behavior identical to the status quo.
We can fix it properly as part of the planned refactoring efforts.
comment:16 by , 9 months ago
Replying to Niklas Haas:
Looking at this problem again, I do agree that the logic is clearly too confusing. There are too many special cases and interacting code paths.
I propose we just revert the problematic cedf5 for now, which produces behavior identical to the status quo.
We can fix it properly as part of the planned refactoring efforts.
ok
also the libswscale/tests/swscale should be turned into a fate test. With -p 0.02 it tests 2% of the cases and passes in ~9 sec, something like that seems practical
comment:17 by , 9 months ago
Resolution: | → fixed |
---|---|
Status: | open → closed |
Seems fixed by f9906911f0b7ed7214675c23139ccaac30592474
Regression since cedf589c09c567b72bf4c1a58db53d94622567e1